Minimizing Total Weighted Tardiness On Parallel Batch Machines With Incompatible Job Families In Semiconductor Industry
| dc.contributor.advisor | Nguyen, Hang Giang Anh | |
| dc.contributor.author | Nguyen, Huu Long | |
| dc.date.accessioned | 2024-09-17T04:43:17Z | |
| dc.date.available | 2024-09-17T04:43:17Z | |
| dc.date.issued | 2023-08 | |
| dc.identifier.uri | http://keep.hcmiu.edu.vn:8080/handle/123456789/5627 | |
| dc.description.abstract | Batch scheduling is a commonly employed method in different industries, including the semiconductor manufacturing sector. The main objective of this research is to minimize the total weighted tardiness on parallel batch processing machines when handling jobs of different sizes and varying release times. Due to the intricacy of this matter, a heuristic approach has been developed to effectively tackle this problem. The result shows the comparison between MIP and the proposed approach. | en_US |
| dc.language.iso | en | en_US |
| dc.subject | Scheduling | en_US |
| dc.subject | total weighted tardiness | en_US |
| dc.subject | heuristics | en_US |
| dc.title | Minimizing Total Weighted Tardiness On Parallel Batch Machines With Incompatible Job Families In Semiconductor Industry | en_US |
| dc.type | Thesis | en_US |
